Job Details:

Job Description:

The Role and Impact As an IP Design Verification Engineer, you will play a pivotal role in ensuring the quality and reliability of Intel's cutting-edge IP designs. Your work will directly contribute to the success of our products and their seamless integration into Intel's broader technology portfolio. You will collaborate with cross-functional teams to verify complex microarchitectural features, enhance verification methodologies, and maintain Intel's commitment to delivering world-class innovations. This position offers an opportunity to make a meaningful impact by validating next-generation technologies and driving advancements in the semiconductor industry. Key Responsibilities - Develop and execute verification plans tailored to microarchitecture specifications. - Create and maintain test benches, test environments, and test cases to ensure comprehensive coverage. - Perform system simulations to verify design functionality and analyze power, timing, and performance. - Identify, replicate, root-cause, and debug issues in the presilicon environment, implementing corrective measures as needed. - Collaborate closely with architects, RTL developers, and physical design teams to improve the verification of complex IP features. - Document verification strategies and conduct technical reviews of plans and proofs with design and architecture teams. - Enhance and maintain functional verification infrastructure and methodologies. - Define and implement verification infrastructure and related methodologies critical to functional design verification.

Qualifications:

Minimum Qualifications
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- 9+ years of experience in IP functional verification with a Master's degree.
- Proficiency in System Verilog and Python.
- Strong knowledge of IP validation tools and methodologies, as well as OVM and UVM environments.
- Experience in test planning, test content development, and test fixture design.
- Familiarity with hardware simulation, microarchitecture fundamentals, and digital design principles.
- Ability to debug and validate complex architectural and microarchitectural features.
- Lead by example and ability to mentor junior engineers in the team is a must have skill.

Preferred Qualifications
- Advanced understanding of hardware architecture and hardware security validation.
- Experience in formal verification methodologies and disciplined execution.
- Knowledge of design for verification (DFV) principles and group problem-solving techniques.
- Strong communication skills and the ability to collaborate effectively across diverse teams.
- Proven track record of maintaining and improving verification infrastructure.

Join us in shaping the future of technology. Apply today to become part of Intel's diverse and innovative team.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Business group:

The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.