We are seeking a highly skilled Senior ASIC Design Engineer to take technical ownership of advanced IP subsystems and contribute to the development of best鈥慽n鈥慶lass, complex, high鈥憄erformance designs used in world鈥憀eading products Sandisk offers.
The ideal candidate will demonstrate proven experience in ASIC design from micro鈥慳rchitecture definition through RTL implementation and validation - and work across multiple teams to ensure successful IP integration and deployment.
This role operates in a fast鈥憄aced, dynamic environment, requiring adaptability and strong communication skills. The engineer will also collaborate closely with engineering teams overseas, driving alignment and ensuring seamless end鈥憈o鈥慹nd execution across global development sites.
Key Responsibilities:
- Take full ownership of the definition, ASIC design, and development of major blocks or subsystems within complex IPs for next-generation SoCs.
- Define micro-architecture and author detailed design specifications aligned with architectural goals and performance targets.
- Implement high-quality, efficient RTL designs (in SystemVerilog), ensuring functionality, performance, and power goals are met.
- Collaborate closely with architecture, verification, physical design, product, and SoC integration teams to deliver top-tier IP solutions.
- Drive debug, coverage closure, and continuous quality improvement throughout the development lifecycle.
- Actively contribute to the core technology team鈥檚 growth by sharing technical expertise, mentoring peers, and driving innovation in ASIC design methodologies and tools.
- Participate in design and code reviews, providing constructive feedback and ensuring design best practices are followed.