We are seeking a highly skilled FPGA Engineer to focus on the critical communication paths of our security processor. This role is central to ensuring that our hardware interacts seamlessly and securely with the broader server ecosystem (BIOS, BMC, and Host). You will be responsible for implementing OEM-specific logic and performing rigorous end-to-end validation across high-speed serial interfaces.
Key Responsibilities:
- End-to-End Testing: Validate high-speed SPI, eSPI, and LTPI interfaces between the security processor, BIOS, and BMC to ensure absolute signal integrity and strict protocol compliance across all power states.
- OEM Mode Logic: Design, implement, and verify specialized FPGA logic to support OEM mode configurations and secure manufacturing/provisioning flows.
- Project & Tooling Integration: Utilize and extend project-based workflows for hardware description and verification, ensuring that FPGA designs are integrated into the wider system-level CI/CD and simulation environments.
- Vendor & Ecosystem Collaboration: Demonstrate the ability to communicate effectively with IP vendors to resolve complex integration issues and develop customized application layers tailored to Axiado鈥檚 unique security architecture.
- Hardware Debugging: Utilize high-speed oscilloscopes, logic analyzers, and internal FPGA debugging tools (e.g., Vivado ILA) to identify and fix physical layer and protocol-level bottlenecks.