The Senior FPGA Validation Engineer position is your opportunity to join one of the industry鈥檚 leading companies in platform security management and ransomware detection for cloud datacenters, 5G infrastructure and disaggregated compute ecosystems. You should have prior knowledge about SOC architecture, and emulation and prototyping platforms. As the Senior FPGA Validation Engineer for Axiado, you will have the opportunity to work in design verification, debug and system integration. You will work closely with the Architecture, Verification, ASIC Design and Software teams.
KEY RESPONSIBILITIES
Help set up FPGA/Emulation platform and device modeling
Help set up FPGA/Emulation debugging tools
Help customize the SOC design for the FPGA/Emulation platform
Duties include modeling, debugging, creating and running validation tests, as well as supporting SW debugging
Work with SOC design engineers, verification, systems and software team to achieve pre-silicon emulation and prototyping goals