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Who We Are

The DCAI and Silicon Eng Team (DASE) deliver leadership Xeon products to cloud and datacenter customers through development of industry leading IPs thatenhancesproduct performance and competitiveness in both Xeon and AI platforms. IP design group within DCAI designs Coherent Fabric IP, Memory controller, NOC, PCIE and many fundamental building blocks for the Xeon server SOCs.

Who You Are

Come and join a winning team at FVCTO (Formal Verification Central Tech Office). As a Formal Verification Engineer, you will beresponsiblethe following but not limited to:

• Verify microarchitecture using industry standard Formal Verification tools and technologies based on latest model checking andequivalencechecking algorithms on world class design IPs & SOCs for Server,Clientand Graphics.

• Usethe hardwarearchitecture design and RTL implementation details.

• Define the Formal Verification scope, deploy the right strategy to prove the correctness while deploying advanced formal techniques, and create abstraction models for convergence on the design.

• Carve out the right boundaries for the design, create comprehensive formalverification testplans, track, verify, apply abstraction techniques, and converge on complex designs to deliver a high-quality design on schedule and articulate the ROI. Analyses new methodologies, evaluates newtoolsandcorroboratesresults.

• Work with vendors on resolving hard design and tool problems.

In addition to the qualifications a successful candidate willdemonstrate:

• Problem solving and debugging skills.

• Willingnessto work closely with various design teams andcross siteteams.

• Verbal and written communication skills.

• Motivated, self-directedand can work effectively both independently and in a team environment.

Minimum Qualifications

The candidate mustpossessthefollowing;

• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 8 years relevant experience or schoolwork

• – OR -Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 7 years relevantexperience  orschoolwork

•  – OR – PhD in Electrical Engineering, Computer Engineering, ComputerScienceor a related field with 3yearrelevant experience or schoolwork

Experience in the following:

• RTL languages like System Verilog or VHDL

• Assertion languages like SVA, formal verification.

Preferred Qualifications

Experience with:

• The fundamentals of formal verification technology, including model checking and writing formal assertions to express architectural intent of designs

• Formal verification principles and methods

• Computer architecture, digitaldesignand verification methods

• Research in formal verification domain