About the Team
Our team is dedicated tooptimizingIntel's process technology to meet evolvingIntel designsneeds. We drive continuous improvements in silicon designs and methodologies, working at the intersection of process development and design implementation. By partnering closely with Core and SoC design teams, we capture andoptimizeprocess requirements to enable competitive, high-performance products.
Role Overview
As aSenior VLSI Process Design Engineer, you will play a key roleinachievingbest-in-class power, performance, and area (PPA) for Intel IPs. You will conduct experiments toidentifychallenges and optimization opportunities in Intel's process technology, evaluate device,cellsand blocks, and translate findings into actionable recommendations that influence strategic decision-making and product direction.
Key Responsibilities
Conduct experiments toidentifypotential challenges and optimization opportunities in Intel's process technology.
Drive continuous improvements to enhance Intel's designs and methodologies across advanced technology nodes.
Define methodologies and build tools tooptimizePPA of Intel IPs.
Analyze PPA results, derive insights, and communicate findings and recommendations to stakeholders, contributing to strategic decision-making and project direction.
Collaborate with Core and SoC design teams to capture andoptimizeprocess requirements that enable competitive designs and products.
Mentor and guide technical teams,fostergrowthand best practices.
BSc or MSc in Electrical Engineering or Computer Engineering.
5+ years of hands-on experience in VLSI physical design, with a proventrack recordof successful projects on advanced technology nodes.
Basicscripting languagesknowledgesuch as Python and TCL.
Preferred
Goodfamiliarity with physical design implementation flows and techniques, includingfloorplanning, placement, routing, and timing closure.
Knowledge at the cell and transistor level.
Deep understanding of thevarious factorsimpactingPPA trade-offs.
Experience mentoring technical teams.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
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