As a Technologist Emulation Engineer in the ASIC Emulation team, you will be responsible for emulation builds, sanity test suite & methodology.
- Providing technical leadership and expertise to define requirements for Emulation and Emulation IP development.
- Create emulation models from RTL / Netlist. Develop hardware collateral to be integrated with the Palladium / FPGA emulation mode.
- Experience in Palladium or Zebu Platforms Automation and increase process efficiencies.
- Collaborating cross-functionally to optimize emulation workflows and standardize methodologies.
- Work with extended teams to debug environment and drive cross-functional testing (Firmware, Software, Verification and Design)
- Triage failures with design, verification, firmware, software teams.
- Mentoring and guiding junior engineers, fostering a culture of collaboration, innovation and continuous improvement.