We are seeking a highly skilled Staff Engineer specializing in ASIC Development Engineering with a focus on Design for Testability (DFT) to join our team in Bangalore, India. In this role, you will be responsible for developing and implementing advanced DFT strategies for complex ASIC designs, ensuring high-quality, testable, and manufacturable semiconductor products.
- Lead the development and implementation of DFT architectures for complex ASIC designs
- Collaborate with cross-functional teams to integrate DFT solutions into the overall ASIC design flow
- Develop and optimize test patterns using Automatic Test Pattern Generation (ATPG) tools
- Implement Built-In Self-Test (BIST) solutions for various ASIC components
- Analyze and improve test coverage, fault coverage, and test time for ASIC designs
- Troubleshoot and debug DFT-related issues during the design and post-silicon phases
- Stay current with industry trends and emerging DFT technologies
- Mentor junior engineers and contribute to the development of best practices and methodologies
- Participate in design reviews and provide technical guidance to ensure DFT requirements are met
- Collaborate with external partners and vendors to evaluate and integrate new DFT tools and technologies