We are seeking a talented and driven Firmware Engineer to join our team and contribute to the host side software stack of machine learning for the Next Gen Computational PCIe Flash Controller project. In this role, you will be a key contributor to the firmware that enables high-performance communication and data transfer between the host and our device. You'll work on critical components, including the PCIe driver, DMA engine, MMIO, and Mailbox interfaces, to ensure a seamless and efficient ML workload.
- Linux PCIe Driver Development: Architect and implement high-performance PCIe drivers for the Linux operating systems. his includes developing a robust architecture for supporting multiple endpoints across multiple cards and ensuring reliable communication.
- PCIe Switch Management: Design and implement the firmware for supporting complex hardware topologies, including multiple PCIe cards connected over an external PCIe switch. You'll be responsible for the driver’s logic to identify and set up the PCI device address for each individual PCIe device within each card.
- Custom Protocol Design: Design and implement a custom, NVMe-like protocol that operates over PCIe MMIO. You'll be responsible for the entire host-side implementation, including:
- Doorbell Registers: Design and implement the mechanism for host software to signal the device by ringing doorbells to submit commands.
- Command Queues: Manage command submission and completion queues in memory.
- Interrupt Handling: Develop the interrupt service routines (ISRs) to handle device-generated interrupts and notify the host of command completions and events.
- DMA Engine Control: Orchestrate the DMA engine to move data efficiently between the host and device without CPU intervention.
- Memory Management: Architect the software for accessing the device's SRAM and DRAM over the PCIe BAR (Base Address Register) space, ensuring optimal performance and cache coherency.
Collaboration: Work closely with the host-side software teams, hardware engineers, and other firmware engineers to ensure a cohesive and high-performing end-to-end solution