路 Responsible for ASIC qualification, yield improvement in engineering and ramp up phase
路 Collaborate with internal R&D and external subcontractors to enhance product robustness for manufacturability
路 ASIC owner and take full responsibility in mass production, e.g. yield monitor/improvement, cost down
路 Perform electrical and physical failure analysis to understand failure mechanism
路 Perform data mining and analysis to find root cause for any excursion and issues
路 Supplier management focus on qualification and failure analysis house, wafer foundry and wafer test OSATs