We are looking for a highly motivated and creative Product Engineer to work for Integrity 3D-IC and Innovus. The successful candidate will be responsible for assisting in the development of the design flows for leading-edge 3D IC designs. The design flows will be based on Cadence Integrity 3D-IC platform that covers all aspects of the 3D IC integration including the system-level planning, physical implementation, timing/PSI/thermal analysis, and physical verification. Among them, the successful candidate will be working primarily on the system-level planning and physical implementation using Integrity 3D-IC and Innovus.
The initial focus for this role will require the close engagement with global top-tier customers. The successful candidate will be required to 1) understand the design specifications and challenges in customer's advanced package designs, 2) work with the internal R&D and field engineer teams to develop and validate new Integrity 3D-IC-based design flows for seamless 3D IC integration, and 3) provide the R&D teams with the customer feedback, competitive threats/opportunities, and other general field intelligence on 3D IC designs in order to align the product development direction with customers' technical needs.
1) Minimum Qualifications
BS in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field.
8+ years of hands-on experience in ASIC digital implementation or relevant fields.
In-depth understanding of the latest EDA tools for physical design.
Excellent interpersonal and team communication skills.
Strong analytical and problem-solving skills.
Knowledge on script languages (Tcl, Perl, Python, or similar).
Ability to fluently speak and write in English.
2) Preferred Qualifications
MS in Electrical Engineering, Computer Engineering, Computer Science, or a closely related major.
10+ years of hands-on experience on ASIC digital implementation or relevant fields.
Deep understanding of design methodology and tools features for 3D integration.
Knowledge on the design challenges in the advanced package design.
Understanding of deep sub-micron design problems and solutions.
cadence