Job Details:

Job Description:

About Altera

Altera is a leader in programmable logic solutions, delivering high-performance FPGA technologies and design platforms that power next-generation innovation across data centers, communications, industrial, automotive, aerospace, and embedded systems. We partner with our customers to push the boundaries of what’s possible in hardware acceleration, system architecture, and high-performance computing. At Altera, you’ll be part of a team that values technical excellence, collaboration, and forward-thinking innovation.

About the Role

Senior Emulation Engineer Leader role requires deep expertise in emulation methodologies, FPGA architecture, and hardware/software co-design. The ideal candidate will lead a team of emulation engineers, develop advanced emulation models, and collaborate with cross-functional teams to ensure robust pre-silicon validation.

Key Responsibilities:

• Lead and mentor a team of emulation engineers to develop and optimize FPGA emulation platforms.

• Define and implement emulation methodologies to accelerate pre-silicon verification and validation cycles.

• Architect, develop, and debug emulation testbenches for complex FPGA designs.

• Collaborate with hardware and software teams to integrate and validate system-level functionality.

• Develop automation frameworks and improve efficiency in emulation environments.

• Identify and resolve performance bottlenecks in emulation models.

• Drive continuous improvements in emulation infrastructure, tools, and processes.

• Work closely with silicon design, verification, and firmware teams to ensure seamless bring-up and validation of FPGA-based solutions.

• Stay updated with industry trends, emerging technologies, and best practices in FPGA emulation and verification.

Salary Range

Qualifications:

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

• 8+ years of experience in FPGA emulation, pre-silicon validation, or related hardware verification.

• 5+ years of experience working with FPGA architectures, RTL design, or hardware emulation environments.

• 5+ years of experience leading or mentoring engineers in a technical environment.

• Strong experience developing emulation methodologies and debugging complex hardware/software interactions.

Preferred Qualifications

• Master’s degree in Electrical Engineering, Computer Engineering, or a related field.

• Experience with hardware/software co-design and system-level validation.

• Experience with FPGA prototyping platforms, emulation systems, and high-performance compute environments.

• Strong scripting and automation skills (e.g., Python, TCL, or similar).

• Experience working cross-functionally with design, verification, and firmware teams.

• Knowledge of industry-standard emulation tools and workflows.

• Demonstrated ability to drive innovation, continuous improvement, and technical strategy.

Job Type:

Regular

Shift:

Shift 1 (United States of America)

Primary Location:

San Jose, California, United States

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.