Own high-speed I/O validation, including defining and executing validation strategies across multiple programs.
Develop, standardize, and maintain validation methodologies, test setups, and measurement flows to enable scalable and repeatable execution.
Perform postâsilicon functional and electrical validation using stateâofâtheâart lab equipment, including highâbandwidth oscilloscopes, protocol analyzers, pattern generators, and logic analyzers.
Collaborate with hardware board design teams on highâspeed channel implementation, including stackâups, routing strategies, and I/O termination topologies; review schematics, layouts, and board design guidelines.
Partner with silicon design, package, board, and software teams to drive debug, rootâcause analysis, and issue resolution.
Drive exploration and enablement of IPâlevel and platformâlevel validation methodologies, tools, and infrastructure to improve validation efficiency, coverage, and throughput.
Focus primarily on high-speed analog I/O and PHY design including transmitters, receivers and voltage regulators for advanced DDR, LPDDR and MIPI interfaces as well as LVDS and GPIO designs.Â
Bachelorâs or Masterâs degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related discipline.
Industry experience in postâsilicon validation, silicon bringâup, or PHY design and development roles.
Strong handsâon experience validating highâspeed interfaces and PHYs such as DDR, LPDDR, MIPI, LVDS, and GPIO.
Deep understanding of highâspeed signal integrity, power integrity, timing, and analog/mixedâsignal behaviors.
Proven expertise using advanced lab equipment, including highâbandwidth oscilloscopes, BERTs, protocol analyzers, logic analyzers, and pattern generators.
Strong background in postâsilicon debug, rootâcause analysis, and driving issues to resolution across silicon, package, board, and software domains.
Proficiency in scripting or programming (e.g., Python, Perl, TCL, C/C++) for validation automation and data analysis.
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