Job Details:

Job Description:

About Altera

At Altera™, our independence as the world’s largest pure‑play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role/Team

The FPGA Circuit Design team is responsible for designing custom circuits for Routing in core fabric and designing High-Speed global and local clocks distributions for the chip using advanced design techniques. The team actively works and collaborates with Architecture, Technology and Test Groups to evaluate, innovate and design best in class solutions for the FPGA fabric.

Responsibilities

As a FPGA Circuit Design Engineer, you will:

• Design and develop FPGA circuits and IPs including FPGA core fabric logic, interconnect routing, clocking, configuration, configurable memory blocks, and network on chip.

• Micro-architect and perform circuit and logic design, schematic entry, simulation, reliability verification, and verifies functionality to optimize FPGA circuits for power, performance, area, timing, and yield goals.

• Develop models and collaterals for FPGA circuits and IPs to integrate into FPGA hardware and software deliverables including circuit integration specifications, behavioral models, electrical rule checkers, design intent, and timing and power models.

• Work with microarchitecture, SoC/full chip, IP fabrics and interconnects, RTL design, and verification teams to develop new capabilities around FPGA solutions, design improved programmable logic designs and deliver faster integration of FPGAs into larger systems.

• Work with test and manufacturing team to implement the align the design with testability.

Qualifications:

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 10+ years of experience in circuit design

• 10+ years of experience designing digital CMOS circuits with a strong focus on optimizing Power, Performance, and Area (PPA)

• 10+ years of experience collaborating cross-functionally with architecture, manufacturing, and test teams to drive design execution and product delivery

• 10+ years of experience presenting, reviewing, and defending design decisions in technical design reviews and broader engineering forums

• 10+ years of experience working with advanced CMOS process technologies, including deep submicron design considerations

• 10+ years of experience analyzing and accounting for layout-dependent effects in circuit design

• 10+ years of experience with static timing analysis (STA) and tools such as Synopsys PrimeTime

• 10+ years of experience using scripting languages such as Python, Perl, or Tcl/Tk for design automation and analysis

• 10+ years of experience using version control systems such as Git in a collaborative development environment

Preferred Qualifications

• 10+ years of experience writing RTL using Verilog for digital design implementation

• Demonstrated track record of innovation in circuit or semiconductor design, including contributions to new methodologies, architectures, or technologies

• Named inventor on patents and/or author of technical publications in relevant domains

• Experience presenting technical work at industry conferences or recognized engineering forums

Job Type:

Regular

Shift:

Shift 1 (United States of America)

Primary Location:

San Jose, California, United States

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.