We are seeking a highly experienced Chip design lead to join our SoC development team. This role involves driving the chip RTL design for power efficient chips and collaborating across architecture, verification, and physical design teams to deliver world-class semiconductor solutions.
- Actively drive the chip integration and the team to meet the project goals
- Review architecture specifications, create RTL micro-arch specifications and drive the RTL design using Verilog/SystemVerilog and industry-standard methodologies
- Optimize RTL for timing, power, and area targets while ensuring design scalability
- Work closely with architecture, Verification, firmware, and physical design teams during development and implementation to achieve the design targets
- Collaborate with verification teams to ensure functional correctness and coverage goals
- Work closely with synthesis and physical design teams for PPA analysis and design convergence
- Work with DFT teams to achieve coverage goals
- Contribute to methodology improvements for design implementation and timing closure
- Provide technical leadership and guidance to junior engineers
- Provide support to functional validation teams in post silicon debug
- Collaborate with other functional teams including Verification, Validation, DFT, physical design and emulation teams to achieve project targets
- IP selection and make/buy decisions