Design Verification
Job Responsibilities:
Principal Accountabilities:
- Lead the DV function by defining test case and coverage for complex gate drivers, creating automation to run the DV suite before tape out.
- Collaborate effectively with Design and other Verification teams.
- Assist in integrating design verification processes to achieve first-pass silicon success, performance goals, and schedule compliance.
- Create accurate Verilog or SystemVerilog model for complex analog blocks.
Key Performance Measures:
- Learn quickly and demonstrate a strong willingness to continuously acquire new skills.
- Meet deadlines with high-quality deliverables.
- Actively share skills and knowledge with team members.
- Collaborate effectively with team members.
- Maintain a high level of professionalism in all tasks and interactions.
- Demonstrate elements of Spirit of Renesas in all aspects of work
- Embrace and embody the company's organizational culture and values.